ICS85408BGT

LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

GENERALDESCRIPTION TheICS85408isalowskew,highperformance1-to-8Differential-to-LVDSClockDistributionChipandamemberoftheHiPerClockS?familyofHighPerformanceClockSolutionsfromICS.TheICS85408CLK,nCLKpaircanacceptmostdifferentialinputlevelsandtranslatesthemto3

85408

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?CLK/nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)toLVDSlevelswithoutexternalbiasnetw

85408BGILF

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?Onedifferentialclockinputpair ?CLK,nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)to

85408BGILF

LowSkew,1-to-8,Differential-to-LVDSClock

85408BGILFT

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?Onedifferentialclockinputpair ?CLK,nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)to

85408BGILFT

LowSkew,1-to-8,Differential-to-LVDSClock

85408BGLF

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?CLK/nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)toLVDSlevelswithoutexternalbiasnetw

85408BGLF

LowSkew,1-to-8,Differential-to-LVDSClock

85408BGLFT

LowSkew,1-to-8,Differential-to-LVDSClock

85408BGLFT

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?CLK/nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)toLVDSlevelswithoutexternalbiasnetw

85408I

LowSkew,1-to-8,Differential-to-LVDSClock

Features ?EightdifferentialLVDSoutputpairs ?Onedifferentialclockinputpair ?CLK,nCLKcanacceptthefollowingdifferentialinputlevels: LVPECL,LVDS,LVHSTL,HCSL,SSTL ?Maximumoutputfrequency:700MHz ?Translatesanydifferentialinputsignal(LVPECL,LVHSTL,SSTL, HCSL)to

85408I

LowSkew,1-to-8,Differential-to-LVDSClock

ICS85408

LOWSKEW,1-TO-8DIFFERENTIAL-TO-LVDSCLOCKDISTRIBUTIONCHIP

GENERALDESCRIPTION TheICS85408isalowskew,highperformance1-to-8Differential-to-LVDSClockDistributionChipandamemberoftheHiPerClockS?familyofHighPerformanceClockSolutionsfromICS.TheICS85408CLK,nCLKpaircanacceptmostdifferentialinputlevelsandtranslatesthemto3

ICS85408BG

LOWSKEW,1-TO-8DIFFERENTIAL-TO-LVDSCLOCKDISTRIBUTIONCHIP

GENERALDESCRIPTION TheICS85408isalowskew,highperformance1-to-8Differential-to-LVDSClockDistributionChipandamemberoftheHiPerClockS?familyofHighPerformanceClockSolutionsfromICS.TheICS85408CLK,nCLKpaircanacceptmostdifferentialinputlevelsandtranslatesthemto3

ICS85408BGLF

LOWSKEW,1-TO-8DIFFERENTIAL-TO-LVDSCLOCKDISTRIBUTIONCHIP

GENERALDESCRIPTION TheICS85408isalowskew,highperformance1-to-8Differential-to-LVDSClockDistributionChipandamemberoftheHiPerClockS?familyofHighPerformanceClockSolutionsfromICS.TheICS85408CLK,nCLKpaircanacceptmostdifferentialinputlevelsandtranslatesthemto3

ICS85408BGLFT

LOWSKEW,1-TO-8DIFFERENTIAL-TO-LVDSCLOCKDISTRIBUTIONCHIP

GENERALDESCRIPTION TheICS85408isalowskew,highperformance1-to-8Differential-to-LVDSClockDistributionChipandamemberoftheHiPerClockS?familyofHighPerformanceClockSolutionsfromICS.TheICS85408CLK,nCLKpaircanacceptmostdifferentialinputlevelsandtranslatesthemto3

ICS85408I

LowSkew,1-to-8,Differential-to-LVDSClock