ICS9LP525-2中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Output Features:

? 2 - CPU differential low power push-pull pairs

? 7- SRC differential low power push-pull pairs

? 1 - CPU/SRC selectable differential low power push-pull pair

? 1 - SRC/DOT selectable differential low power push-pull pair

? 5 - PCI, 33MHz

? 1 - PCI_F, 33MHz free running

? 1 - USB, 48MHz

? 1 - REF, 14.318MHz

Key Specifications:

? CPU outputs cycle-cycle jitter < 85ps

? SRC output cycle-cycle jitter < 125ps

? PCI outputs cycle-cycle jitter < 250ps

? +/- 100ppm frequency accuracy on all outputs

? SRC are PCIe Gen2 compliant