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IDT54FCT16841BTPAB中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
廠商型號(hào) |
IDT54FCT16841BTPAB |
功能描述 | FAST CMOS 20-BIT TRANSPARENT LATCHES |
文件大小 |
135.16 Kbytes |
頁(yè)面數(shù)量 |
9 頁(yè) |
生產(chǎn)廠商 | Integrated Device Technology, Inc. |
企業(yè)簡(jiǎn)稱 |
IDT |
中文名稱 | Integrated Device Technology, Inc.官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2024-11-17 15:35:00 |
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IDT54FCT16841BTPAB規(guī)格書(shū)詳情
DESCRIPTION:
The FCT16841AT/BT/CT/ET and FCT162841AT/BT/CT/ET 20-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 10-bit latches or one 20-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
FEATURES:
? Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1μA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10
? Features for FCT16841AT/BT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “l(fā)ive insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C
? Features for FCT162841AT/BT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial), ±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce)