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IDT723636L15PFG中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

IDT723636L15PFG
廠商型號

IDT723636L15PFG

功能描述

CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2

文件大小

404.96 Kbytes

頁面數(shù)量

36

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-10 17:34:00

IDT723636L15PFG規(guī)格書詳情

? Memory storage capacity:

IDT723626 – 256 x 36 x 2

IDT723636 – 512 x 36 x 2

IDT723646 – 1,024 x 36 x 2

? Clock frequencies up to 67 MHz (10ns access time)

? Two independent FIFOs buffer data between one bidirectional

36-bit port and two unidirectional 18-bit ports (Port C receives

and Port B transmits)

? 18-bit (word) and 9-bit (byte) bus sizing of 18 bits (word) on

Ports B and C

? Select IDT Standard timing (using EFA, EFB, FFA, and FFC flag

functions) or First Word Fall Through Timing (using ORA, ORB,

IRA, and IRC flag functions)

? Programmable Almost-Empty and Almost-Full flags; each has

three default offsets (8, 16 and 64)

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