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IDT72521L25J中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
IDT72521L25J |
| 功能描述 | PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18 |
| 文件大小 |
434.59 Kbytes |
| 頁面數(shù)量 |
28 頁 |
| 生產(chǎn)廠商 | Integrated Device Technology, Inc. |
| 企業(yè)簡稱 |
IDT |
| 中文名稱 | Integrated Device Technology, Inc.官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-3-6 18:06:00 |
| 人工找貨 | IDT72521L25J價格和庫存，歡迎聯(lián)系客服免費人工找貨 |
IDT72521L25J規(guī)格書詳情
DESCRIPTION:
The IDT72511 and IDT72521 are highly integrated first-in, first-out memories that enhance processor-to-processor and processor-to-peripheral communications. IDT BiFIFOs integrate two side-by-side memory arrays for data transfers in two directions.
FEATURES:
? Two side-by-side FIFO memory arrays for bidirectional
data transfers
? 512 x 18-Bit - 512 x 18-Bit (IDT72511)
? 1024 x 18-Bit - 1024 x 18-Bit (IDT72521)
? 18-bit data buses on Port A side and Port B side
? Can be configured for 18-to-18-bit or 36-to-36-bit communication
? Fast 35ns access time
? Fully programmable standard microprocessor interface
? Built-in bypass path for direct data transfer between two
ports
? Two fixed flags, Empty and Full, for both the A-to-B and
the B-to-A FIFO
? Two programmable flags, Almost-Empty and Almost-Full
for each FIFO
? Programmable flag offset can be set to any depth in the
FIFO
? Any of the eight flags can be assigned to four external
flag pins
? Flexible reread/rewrite capabilities
? Six general-purpose programmable I/O pins
? Standard DMA control pins for data exchange with
peripherals
? 68-pin PGA and PLCC packages
