首頁(yè)>IDT72V3626L10PF>規(guī)格書詳情
IDT72V3626L10PF中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書
廠商型號(hào) |
IDT72V3626L10PF |
功能描述 | 3.3 VOLT CMOS TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 |
文件大小 |
329.85 Kbytes |
頁(yè)面數(shù)量 |
36 頁(yè) |
生產(chǎn)廠商 | Integrated Device Technology, Inc. |
企業(yè)簡(jiǎn)稱 |
IDT |
中文名稱 | Integrated Device Technology, Inc.官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-1 16:30:00 |
IDT72V3626L10PF規(guī)格書詳情
DESCRIPTION:
The IDT72V3626/72V3636/72V3646 are pin and functionally compatible versions of the IDT723626/723636/723646, designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are a monolithic, high-speed, low-power, CMOS Triple Bus synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5ns. Two independent 256/512/1,024 x 36 dual-port SRAM FIFOs on board each chip buffer data between a bidirectional 36-bit bus (Port A) and two unidirectional 18-bit buses (Port B transmits data, Port C receives data.) FIFO data can be read out of Port B and written into Port C using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations.
FEATURES:
? Memory storage capacity:
IDT72V3626–256 x 36 x 2
IDT72V3636–512 x 36 x 2
IDT72V3646–1,024 x 36 x 2
? Clock frequencies up to 100 MHz (6.5ns access time)
? Two independent FIFOs buffer data between one bidirectional 36-bit port and two unidirectional 18-bit ports (Port C receives and Port B transmits)
? 18-bit (word) and 9-bit (byte) bus sizing of 18 bits (word) on Ports B and C
? Select IDT Standard timing (using EFA, EFB, FFA, and FFC flag functions) or First Word Fall Through Timing (using ORA, ORB, IRA, and IRC flag functions)
? Programmable Almost-Empty and Almost-Full flags; each has three default offsets (8, 16 and 64)
? Serial or parallel programming of partial flags
? Big- or Little-Endian format for word and byte bus sizes
? Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings
? Mailbox bypass registers for each FIFO
? Free-running CLKA, CLKB and CLKC may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted)
? Auto power down minimizes power dissipation
? Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)
? Pin and functionally compatible versions of 5V operating IDT723626/723636/723646
? Industrial temperature range (–40°C to +85°C) is available
產(chǎn)品屬性
- 型號(hào):
IDT72V3626L10PF
- 功能描述:
IC FIFOSYNC 256X36X2 10NS 128QFP
- RoHS:
否
- 類別:
集成電路(IC) >> 邏輯 - FIFO
- 系列:
72V
- 標(biāo)準(zhǔn)包裝:
90
- 系列:
7200
- 功能:
同步
- 存儲(chǔ)容量:
288K(16K x 18)
- 數(shù)據(jù)速率:
100MHz
- 訪問時(shí)間:
10ns
- 電源電壓:
4.5 V ~ 5.5 V
- 工作溫度:
0°C ~ 70°C
- 安裝類型:
表面貼裝
- 封裝/外殼:
64-LQFP
- 供應(yīng)商設(shè)備封裝:
64-TQFP(14x14)
- 包裝:
托盤
- 其它名稱:
72271LA10PF
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
IDT |
24+ |
QFP |
79 |
詢價(jià) | |||
IDT |
22+ |
TQFP |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價(jià) | ||
IDT |
23+ |
TQFP128 |
796 |
原裝正品代理渠道價(jià)格優(yōu)勢(shì) |
詢價(jià) | ||
IDT |
22+ |
QFP |
10000 |
原裝正品優(yōu)勢(shì)現(xiàn)貨供應(yīng) |
詢價(jià) | ||
IDT |
23+ |
128TQFP |
9526 |
詢價(jià) | |||
IDT |
1999 |
19 |
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu) |
詢價(jià) | |||
IDT |
23+ |
QFP |
10000 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢價(jià) | ||
IDT |
22+ |
1300 |
⊙⊙新加坡大量現(xiàn)貨庫(kù)存,深圳常備現(xiàn)貨!歡迎查詢!⊙ |
詢價(jià) | |||
IDT |
22+ |
120TQFP |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) | ||
IDT |
21+ |
120TQFP |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) |