IDT72V3672中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION:

The IDT72V3652/72V3662/72V3672 are pin and functionally compatible versions of the IDT723652/723662/723672, designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are monolithic, high-speed, low-power, CMOS Bidirectional SyncFIFO (clocked) memories which support clock frequencies up to 100MHz and have read access times as fast as 6.5ns. Two independent 2,048/4,096/8,192 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored.

FEATURES:

? Memory storage capacity:

IDT72V3652 – 2,048 x 36 x 2

IDT72V3662 – 4,096 x 36 x 2

IDT72V3672 – 8,192 x 36 x 2

? Supports clock frequencies up to 100MHz

? Fast access times of 6.5ns

? Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted)

? Two independent clocked FIFOs buffering data in opposite directions

? Mailbox bypass register for each FIFO

? Programmable Almost-Full and Almost-Empty flags

? Microprocessor Interface Control Logic

? FFA/IRA, EFA/ORA, AEA, and AFA flags synchronized by CLKA

? FFB/IRB, EFB/ORB, AEB, and AFB flags synchronized by CLKB

? Select IDT Standard timing (using EFA, EFB, FFA and FFB flags functions) or First Word Fall Through timing (using ORA, ORB, IRA and IRB flag functions)

? Available in 132-pin Plastic Quad Flatpack (PQFP) or space-saving 120-pin Thin Quad Flatpack (TQFP)

? Pin and functionally compatible versions of the 5V operating IDT723652/723662/723672

? Pin compatible to the lower density parts, IDT72V3622/72V3632/ 72V3642

? Industrial temperature range (–40°C to +85°C) is available