首頁(yè)>IDT72V3696L10PF>規(guī)格書(shū)詳情
IDT72V3696L10PF中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
廠商型號(hào) |
IDT72V3696L10PF |
功能描述 | 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING |
文件大小 |
395.33 Kbytes |
頁(yè)面數(shù)量 |
39 頁(yè) |
生產(chǎn)廠商 | Integrated Device Technology, Inc. |
企業(yè)簡(jiǎn)稱(chēng) |
IDT |
中文名稱(chēng) | Integrated Device Technology, Inc.官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-7 17:09:00 |
IDT72V3696L10PF規(guī)格書(shū)詳情
DESCRIPTION
The IDT72V3686/72V3696/72V36106 are designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are a monolithic, high-speed, low-power, CMOS Triple Bus synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5ns. Two independent 16,384/32,768/65,536 x 36 dual-port SRAM FIFOs on board each chip buffer data between a bidirectional 36-bit bus (Port A) and two unidirectional 18-bit buses (Port B transmits data, Port C receives data.) FIFO data can be read out of Port B and written into Port C using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations.
FEATURES
? Memory storage capacity:
IDT72V3686 – 16,384 x 36 x 2
IDT72V3696 – 32,768 x 36 x 2
IDT72V36106 – 65,536 x 36 x 2
? Clock frequencies up to 100 MHz (6.5ns access time)
? Two independent FIFOs buffer data between one bidirectional 36-bit port and two unidirectional 18-bit ports (Port C receives and Port B transmits)
? 18-bit (word) and 9-bit (byte) bus sizing of 18 bits (word) on Ports B and C
? Select IDT Standard timing (using EFA , EFB , FFA , and FFC flag functions) or First Word Fall Through Timing (using ORA, ORB, IRA, and IRC flag functions)
? Programmable Almost-Empty and Almost-Full flags; each has five default offsets (8, 16, 64, 256 and 1024)
? Serial or parallel programming of partial flags
? Big- or Little-Endian format for word and byte bus sizes
? Loopback mode on Port A
? Retransmit Capability
? Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings
? Mailbox bypass registers for each FIFO
? Free-running CLKA, CLKB and CLKC may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted)
? Auto power down minimizes power dissipation
? Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)
? Pin compatible to the lower density parts, IDT72V3626/72V3636/ 72V3646/72V3656/72V3666/72V3676
? Industrial temperature range (–40°C to +85°C) is available
產(chǎn)品屬性
- 型號(hào):
IDT72V3696L10PF
- 功能描述:
IC FIFO 131X18 10NS 128QFP
- RoHS:
否
- 類(lèi)別:
集成電路(IC) >> 邏輯 - FIFO
- 系列:
72V
- 標(biāo)準(zhǔn)包裝:
15
- 系列:
74F
- 功能:
異步
- 存儲(chǔ)容量:
256(64 x 4)
- 數(shù)據(jù)速率:
-
- 訪問(wèn)時(shí)間:
-
- 電源電壓:
4.5 V ~ 5.5 V
- 工作溫度:
0°C ~ 70°C
- 安裝類(lèi)型:
通孔
- 封裝/外殼:
24-DIP(0.300,7.62mm)
- 供應(yīng)商設(shè)備封裝:
24-PDIP
- 包裝:
管件
- 其它名稱(chēng):
74F433
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
IDT |
23+ |
128TQFP |
9526 |
詢(xún)價(jià) | |||
IDT |
23+ |
QFP |
2500 |
絕對(duì)全新原裝!現(xiàn)貨!特價(jià)!請(qǐng)放心訂購(gòu)! |
詢(xún)價(jià) | ||
IDT |
21+ |
120TQFP |
13880 |
公司只售原裝,支持實(shí)單 |
詢(xún)價(jià) | ||
24+ |
QFP |
8 |
詢(xún)價(jià) | ||||
IDT |
24+ |
QFP |
6980 |
原裝現(xiàn)貨,可開(kāi)13%稅票 |
詢(xún)價(jià) | ||
IDT |
22+ |
BGA |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢(xún)價(jià) | ||
IDT |
05+ |
原廠原裝 |
4319 |
只做全新原裝真實(shí)現(xiàn)貨供應(yīng) |
詢(xún)價(jià) | ||
IDT |
23+ |
NA |
19960 |
只做進(jìn)口原裝,終端工廠免費(fèi)送樣 |
詢(xún)價(jià) | ||
IC |
23+ |
BGA |
3000 |
一級(jí)代理原廠VIP渠道,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、 |
詢(xún)價(jià) | ||
IDT |
22+ |
120TQFP |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢(xún)價(jià) |