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74ALVC74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74ALVC74isadualpositiveedgetriggered,D-typeflip-flop.Ithasindividualdata(nD)inputs, clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsthatoperateindependentlyofth

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74ALVC74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74ALVC74isadualpositive-edgetriggered,D-typeflip-flopwithindividualdata(D),clock(CP),set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informationont

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74ALVC74BQ

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74ALVC74isadualpositive-edgetriggered,D-typeflip-flopwithindividualdata(D),clock(CP),set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informationont

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74ALVC74BQ

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74ALVC74isadualpositiveedgetriggered,D-typeflip-flop.Ithasindividualdata(nD)inputs, clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsthatoperateindependentlyofth

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74ALVC74D

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74ALVC74isadualpositiveedgetriggered,D-typeflip-flop.Ithasindividualdata(nD)inputs, clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsthatoperateindependentlyofth

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74ALVC74D

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74ALVC74isadualpositive-edgetriggered,D-typeflip-flopwithindividualdata(D),clock(CP),set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informationont

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74ALVC74PW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74ALVC74isadualpositiveedgetriggered,D-typeflip-flop.Ithasindividualdata(nD)inputs, clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsthatoperateindependentlyofth

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74ALVC74PW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74ALVC74isadualpositive-edgetriggered,D-typeflip-flopwithindividualdata(D),clock(CP),set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informationont

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

SN74ALVC74

DUALPOSITIVE-EDGE-TRIGGEREDD-TYPEFLIP-FLOPWITHCLEARANDPRESET

TITexas Instruments

德州儀器美國德州儀器公司

SN74ALVC74D

DUALPOSITIVE-EDGE-TRIGGEREDD-TYPEFLIP-FLOPWITHCLEARANDPRESET

TITexas Instruments

德州儀器美國德州儀器公司

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更多IDT74ALVC74PG供應(yīng)商 更新時(shí)間2025-1-23 16:20:00

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