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IDT74FCT162244CTPAB中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

IDT74FCT162244CTPAB
廠商型號

IDT74FCT162244CTPAB

功能描述

FAST CMOS 16-BIT BUFFER/LINE DRIVER

文件大小

151.37 Kbytes

頁面數(shù)量

9

生產(chǎn)廠商 Integrated Device Technology, Inc.
企業(yè)簡稱

IDT

中文名稱

Integrated Device Technology, Inc.官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-12-29 13:38:00

IDT74FCT162244CTPAB規(guī)格書詳情

DESCRIPTION:

The 16-Bit Buffer/Line Driver is for bus interface or signal buffering applications requiring high speed and low power dissipation. These devices have a flow through pin organization, and shrink packaging to simplify board layout. All inputs are designed with hysteresis for improved noise margin. The three-state controls allow independent 4-bit, 8-bit or combined 16-bit operation. These parts are plug in replacements for 54/74ABT16244 where higher speed, lower noise or lower power dissipation levels are desired.

FEATURES:

? Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for ABT functions

– Typical tSK(o) (Output Skew) < 250ps

– Low input and output leakage ≤ 1μA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

? Features for FCT16244T/AT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)

– Power off disable outputs permit “l(fā)ive insertion”

– Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C

? Features for FCT162244T/AT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial), ±16mA (military)

– Reduced system switching noise

– Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C

? Features for FCT166244T/AT/CT:

– Light Drive Balanced Output: ±8mA (commercial), ±6mA (military)

– Minimal system switching noise

– Typical VOLP (Output Ground Bounce) < 0.25V at VCC = 5V,TA = 25°C

? Features for FCT162H244T/AT/CT/ET:

– Bus-Hold retains last active bus state during 3-state

– Eliminates the need for external pull up resistors

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