IDT74LVCH16374APV中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The LVCH16374A 16-bit edge-triggered D-type register is built using advanced dual metal CMOS technology. This high-speed, low-power register is ideal for use as a buffer register for data synchronization and storage. The Output Enable (OE) and clock (CLK) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

All pins of the LVCH16374A can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system.

The LVCH16374A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.

The LVCH16374A has “bus-hold” which retains the inputs’ last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.

FEATURES:

? Typical tSK(o) (Output Skew) < 250ps

? ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

? VCC = 3.3V ± 0.3V, Normal Range

? VCC = 2.7V to 3.6V, Extended Range

? CMOS power levels (0.4μ W typ. static)

? All inputs, outputs, and I/O are 5V tolerant

? Supports hot insertion

? Available in SSOP and TSSOP packages

APPLICATIONS:

? 5V and 3.3V mixed voltage systems

? Data communication and telecommunication systems

DRIVE FEATURES:

? High Output Drivers: ±24mA

? Reduced system switching noise