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IDT82V2048EDR中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書

IDT82V2048EDR
廠商型號(hào)

IDT82V2048EDR

功能描述

OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT

文件大小

1.93243 Mbytes

頁(yè)面數(shù)量

76 頁(yè)

生產(chǎn)廠商 Integrated Device Technology, Inc.
企業(yè)簡(jiǎn)稱

IDT

中文名稱

Integrated Device Technology, Inc.官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-7 11:40:00

IDT82V2048EDR規(guī)格書詳情

DESCRIPTION:

The IDT82V2048E can be configured as an octal T1, octal E1 or octal J1 Line Interface Unit. The IDT82V2048E performs clock/data recovery, AMI/B8ZS/HDB3 line decoding and detects and reports the LOS conditions. An integrated Adaptive Equalizer is available to increase the receive sensitivity and enable programming of LOS levels. In transmit path, there is an AMI/B8ZS/HDB3 encoder and Waveform Shaper. There is one Jitter Attenuator for each channel, which can be placed in either the receive path or the transmit path. The Jitter Attenuator can also be disabled.

FEATURES:

? Eight channel T1/E1/J1 short haul line interfaces

? Supports HPS (Hitless Protection Switching) for 1+1 protection without external relays

? Programmable T1/E1/J1 switchability allowing one bill of material for any line condition

? Single 3.3 V power supply with 5 V tolerance on digital interfaces

? Meets or exceeds specifications in

- ANSI T1.102, T1.403 and T1.408

- ITU I.431, G.703,G.736, G.775 and G.823

- ETSI 300-166, 300-233 and TBR 12/13

- AT&T Pub 62411

? Per channel software selectable on:

- Wave-shaping templates

- Line terminating impedance (T1:100 ?, J1:110 ?, E1:75 ?/120 ?)

- Adjustment of arbitrary pulse shape

- JA (Jitter Attenuator) position (receive path or transmit path)

- Single rail/dual rail system interfaces

- B8ZS/HDB3/AMI line encoding/decoding

- Active edge of transmit clock (TCLK) and receive clock (RCLK)

- Active level of transmit data (TDATA) and receive data (RDATA)

- Receiver or transmitter power down

- High impedance setting for line drivers

- PRBS (Pseudo Random Bit Sequence) generation and detection with 215-1 PRBS polynomials for E1

- QRSS (Quasi Random Sequence Signals) generation and detection with 220-1 QRSS polynomials for T1/J1

- 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS error counter

- Analog loopback, Digital loopback, Remote loopback and Inband loopback

? Adaptive receive sensitivity up to -20 dB

? Non-intrusive monitoring per ITU G.772 specification

? Short circuit protection for line drivers

? LOS (Loss Of Signal) detection with programmable LOS levels

? AIS (Alarm Indication Signal) detection

? JTAG interface

? Supports serial control interface, Motorola and Intel Non-Multiplexed interfaces

? Package: IDT82V2048E: 208-pin PQFP and 208-pin PBGA

產(chǎn)品屬性

  • 型號(hào):

    IDT82V2048EDR

  • 功能描述:

    IC LIU T1/E1 8CH SHORT 208-TQFP

  • RoHS:

  • 類別:

    集成電路(IC) >> 接口 - 驅(qū)動(dòng)器,接收器,收發(fā)器

  • 系列:

    -

  • 標(biāo)準(zhǔn)包裝:

    250

  • 類型:

    收發(fā)器

  • 驅(qū)動(dòng)器/接收器數(shù):

    2/2

  • 規(guī)程:

    RS232

  • 電源電壓:

    3 V ~ 5.5 V

  • 安裝類型:

    表面貼裝

  • 封裝/外殼:

    16-TSSOP(0.173,4.40mm 寬)

  • 供應(yīng)商設(shè)備封裝:

    16-TSSOP

  • 包裝:

    帶卷(TR)

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
IDT
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受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣!
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原裝正品,自己庫(kù)存 假一罰十
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軍工一級(jí)專供只做進(jìn)口原裝假一罰十價(jià)優(yōu)!
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