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IN74AC109D中文資料INTEGRAL數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
IN74AC109D |
| 功能描述 | Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| 文件大小 |
170.71 Kbytes |
| 頁(yè)面數(shù)量 |
5 頁(yè) |
| 生產(chǎn)廠商 | Integral Corp. |
| 企業(yè)簡(jiǎn)稱(chēng) |
INTEGRAL |
| 中文名稱(chēng) | Integral Corp.官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-1-28 16:30:00 |
IN74AC109D規(guī)格書(shū)詳情
The IN74AC109 is identical in pinout to the LS/ALS109,HC/HCT109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALS outputs.
This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop.
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 2.0 to 6.0 V
? Low Input Current: 1.0 μA; 0.1 μA @ 25°C
? High Noise Immunity Characteristic of CMOS Devices
? Outputs Source/Sink 24 mA
產(chǎn)品屬性
- 型號(hào)：
IN74AC109D
- 制造商：
INTEGRAL
- 制造商全稱(chēng)：
INTEGRAL
- 功能描述：
Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
