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IN74AC175D中文資料INTEGRAL數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
IN74AC175D |
| 功能描述 | Quad D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS |
| 文件大小 |
136.68 Kbytes |
| 頁(yè)面數(shù)量 |
5 頁(yè) |
| 生產(chǎn)廠商 | Integral Corp. |
| 企業(yè)簡(jiǎn)稱 |
INTEGRAL |
| 中文名稱 | Integral Corp.官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-3-12 13:30:00 |
| 人工找貨 | IN74AC175D價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
IN74AC175D規(guī)格書(shū)詳情
Quad D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS
The IN74AC175 is identical in pinout to the LS/ALS175, HC/HCT175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.
This device consists of four D flip-flops with common Reset and Clock inputs, and separate D inputs. Reset (active-low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D input is transferred to the corresponding Q output on the next positive-going edge of the Clock input.
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 2.0 to 6.0 V
? Low Input Current: 1.0 μA; 0.1 μA @ 25°C
? High Noise Immunity Characteristic of CMOS Devices
? Outputs Source/Sink 24 mA
產(chǎn)品屬性
- 型號(hào)：
IN74AC175D
- 制造商：
INTEGRAL
- 制造商全稱：
INTEGRAL
- 功能描述：
Quad D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
INTEGRAL |
24+ |
原廠封裝 |
8060 |
原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
IKSEMICON |
23+ |
NA |
19960 |
只做進(jìn)口原裝,終端工廠免費(fèi)送樣 |
詢價(jià) |
