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IN74HC4015N中文資料INTEGRAL數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
IN74HC4015N規(guī)格書(shū)詳情
The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two identical independent 4-stage serial input/parallel-output registers. Each register has independent Clock and Reset inputs as well as a single serial Data input. “Q” outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line.
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 2.0 to 6.0 V
? Low Input Current: 1.0 μA
? High Noise Immunity Characteristic of CMOS Devices
產(chǎn)品屬性
- 型號(hào)：
IN74HC4015N
- 制造商：
INTEGRAL
- 制造商全稱(chēng)：
INTEGRAL
- 功能描述：
Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS
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|---|---|---|---|---|---|---|---|
SKHYNIX/海力士 |
23+ |
NA/ |
1078 |
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22+23+ |
SOP16 |
31595 |
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HYNIX |
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256800 |
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詢價(jià) | |||
HYNIX |
24+ |
SOP16 |
1632 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
N/A |
2021+ |
SMD |
100500 |
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1923+ |
SOP16 |
5000 |
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HYNIX |
23+ |
SOP16 |
12800 |
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1560 |
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1560 |
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詢價(jià) |
