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IS61NF51218中文資料北京矽成數(shù)據(jù)手冊PDF規(guī)格書

IS61NF51218
廠商型號

IS61NF51218

功能描述

SRAM

文件大小

155.61 Kbytes

頁面數(shù)量

20

生產廠商 Integrated Silicon Solution Inc
企業(yè)簡稱

ISSI北京矽成

中文名稱

北京矽成半導體有限公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二

更新時間

2025-2-8 15:03:00

IS61NF51218規(guī)格書詳情

DESCRIPTION

The 8 Meg NF product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for network and communications customers. They are organized as 262,144 words by 32 bits, 262,144 words by 36 bits and 524,288 words by 18 bits, fabricated with ISSIs advanced CMOS technology.

Incorporating a no wait state feature, wait cycles are eliminated when the bus switches from read to write, or write to read. This device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers are controlled by a positive-edge-triggered single clock input. Operations may be suspended and all synchronous inputs ignored when Clock Enable, CKE is HIGH. In this state the internal device will hold their previous values.

All Read, Write and Deselect cycles are initiated by the ADV input. When the ADV is HIGH the internal burst counter is incremented. New external addresses can be loaded when ADV is LOW.

Write cycles are internally self-timed and are initiated by the rising edge of the clock inputs and when WE is LOW. Separate byte enables allow individual bytes to be written.

A burst mode pin (MODE) defines the order of the burst sequence. When tied HIGH, the interleaved burst sequence is selected. When tied LOW, the linear burst sequence is selected.

FEATURES

? 100 percent bus utilization

? No wait cycles between Read and Write

? Internal self-timed write cycle

? Individual Byte Write Control

? Single R/W (Read/Write) control pin

? Clock controlled, registered address, data and control

? Interleaved or linear burst sequence control using MODE input

? Three chip enables for simple depth expansion and address pipelining for TQFP

? Power Down mode

? Common data inputs and data outputs

? CKE pin to enable clock and suspend operation

? JEDEC 100-pin TQFP, 119 PBGA package

? Single +3.3V power supply (± 5)

? NF Version: 3.3V I/O Supply Voltage

? NLF Version: 2.5V I/O Supply Voltage

? Industrial temperature available

供應商 型號 品牌 批號 封裝 庫存 備注 價格
ISSI
24+
BGA
65300
一級代理/放心購買!
詢價
ISSI
2339+
BGA
5825
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強勢庫存!
詢價
ISSI
2021+
BGA
100500
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨
詢價
ISSI
23+
BGA
7300
專注配單,只做原裝進口現(xiàn)貨
詢價
ISSI
23+
BGA
7300
專注配單,只做原裝進口現(xiàn)貨
詢價
ISSI
22+
BGA
20000
保證原裝正品,假一陪十
詢價
ISSI Integrated Silicon Soluti
22+
100TQFP (14x20)
9000
原廠渠道,現(xiàn)貨配單
詢價
ISSI Integrated Silicon Solut
24+
165-TBGA
9350
獨立分銷商 公司只做原裝 誠心經營 免費試樣正品保證
詢價
ISSI
24+
BGA
4500
原裝正品!公司現(xiàn)貨!歡迎來電!
詢價
ISSI/芯成
22+
BGA
17700
原裝正品
詢價