DESCRIPTION

The 4 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K words by 18 bits, fabricated with ISSIs advanced CMOS technology.

FEATURES

? 100 percent bus utilization

? No wait cycles between Read and Write

? Internal self-timed write cycle

? Individual Byte Write Control

? Single R/W (Read/Write) control pin

? Clock controlled, registered address, data and control

? Interleaved or linear burst sequence control using MODE input

? Three chip enables for simple depth expansion and address pipelining

? Power Down mode

? Common data inputs and data outputs

? CKE pin to enable clock and suspend operation

? JEDEC 100-pin TQFP, 165-ball PBGA and 119- ball PBGA packages

? Power supply:

NVP: Vdd 2.5V (± 5), Vddq 2.5V (± 5)

NLP: Vdd 3.3V (± 5), Vddq 3.3V/2.5V (± 5)

? Industrial temperature available

? Lead-free available

IS61NLP25618A-200TQLI屬于集成電路（IC） > 存儲(chǔ)器。北京矽成半導(dǎo)體有限公司制造生產(chǎn)的IS61NLP25618A-200TQLI存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性?xún)煞N，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。