ISL6752集成電路（IC）的DC-DC開關(guān)控制器規(guī)格書PDF中文資料

The ISL6752 is a high-performance, low-pin-count alternative

zero-voltage switching (ZVS) full-bridge PWM controller. Like

Intersil’s ISL6551, it achieves ZVS operation by driving the

upper bridge FETs at a fixed 50 duty cycle while the lower

bridge FETs are trailing-edge modulated with adjustable

resonant switching delays. Compared to the more familiar

phase-shifted control method, this algorithm offers equivalent

efficiency and improved overcurrent and light-load performance

with less complexity in a lower pin count package.

The ISL6752 features complemented PWM outputs for

synchronous rectifier (SR) control. The complemented

outputs may be dynamically advanced or delayed relative to

the PWM outputs using an external control voltage.

This advanced BiCMOS design features precision deadtime

and resonant delay control, and an oscillator adjustable to

2MHz operating frequency. Additionally, Multi-Pulse

Suppression ensures alternating output pulses at low duty

cycles where pulse skipping may occur.

Features

? Adjustable Resonant Delay for ZVS Operation

? Synchronous Rectifier Control Outputs with Adjustable

Delay/Advance

? Current-Mode Control

? 3 Current Limit Threshold

? Adjustable Deadtime Control

? 175μA Start-up Current

? Supply UVLO

? Adjustable Oscillator Frequency Up to 2MHz

? Internal Over-Temperature Protection

? Buffered Oscillator Sawtooth Output

? Fast Current Sense to Output Delay

? Adjustable Cycle-by-Cycle Peak Current Limit

? 70ns Leading Edge Blanking

? Multi-Pulse Suppression

? Pb-Free (RoHS Compliant)

Applications

? ZVS Full-Bridge Converters

? Telecom and Datacom Power

? Wireless Base Station Power

? File Server Power

? Industrial Power Systems