ISO6521FREUR中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

1 Features

? Dual channel, CMOS output functional isolators

? 50-Mbps data rate

? Robust SiO2 isolation barrier with ±150 kV/μs

typical CMTI

? Functional Isolation:

– 200-VRMS, 280VDC working voltage

– 570-VRMS, 800VDC transient voltage (60s)

? Available in a compact 8-REU package with 2.2

mm creepage

? Wide supply range: 1.71 V to 1.89 V and 2.25 V to

5.5 V

? 1.71-V to 5.5-V level translation

? Default output High (ISO652x) and Low

(ISO652xF) Options

? Wide temperature range: –40°C to +125°C

? 1.8 mA per channel typical at 1 Mbps at 3.3 V

? Low propagation delay: 11 ns typical at 3.3 V

? Robust electromagnetic compatibility (EMC)

– System-Level ESD, EFT, and surge immunity

– Low emissions

? Leadless-DFN (8-REU) package and Narrow-

SOIC (D-8) package options

2 Applications

? Power supplies

? Grid, Electricity meter

? Motor drives

? Factory automation

? Building automation

? Lighting

? Appliances

3 Description

The ISO652x devices are high-performance, dualchannel

functional isolators designed for cost

sensitive, space constrained applications that require

isolation for non-safety applications. The isolation

barrier supports a working voltage of 200VRMS /

280VDC and transient over voltages of 570VRMS /

800VDC.

The devices provide high electromagnetic immunity

and low emissions at low power consumption, while

isolating CMOS or LVCMOS digital I/Os. Each

isolation channel has a logic input and output buffer

separated by TI's double capacitive silicon dioxide

(SiO2) insulation barrier. ISO6520 has two isolation

channels with both channels in the same direction.

ISO6521 has two isolation channels with one channel

in each direction. In the event of input power or signal

loss, the default output is high for devices without

suffix F and low for devices with suffix F. See Device

Functional Modes section for further details.

These devices help prevent noise currents on data

buses, such as UART, SPI, RS-485, RS-232, and

CAN from damaging sensitive circuitry. Through chip

design and layout techniques, the electromagnetic

compatibility of the devices have been significantly

enhanced to ease system-level ESD and emissions

compliance.