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ISPLSI1032-90LJ/833規(guī)格書詳情
Description
The ispLSI and pLSI 1032 are High-Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 1032 features 5-Volt insystem programming and in-system diagnostic capabilities. It is the first device which offers non-volatile on-the-fly reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. It is architecturally and parametrically compatible to the pLSI 1032 device, but multiplexes four of the dedicated input pins to control in-system programming.
Features
? HIGH-DENSITY PROGRAMMABLE LOGIC
— High Speed Global Interconnect
— 6000 PLD Gates
— 64 I/O Pins, Eight Dedicated Inputs
— 192 Registers
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Fast Random Logic
— Security Cell Prevents Unauthorized Copying
? HIGH PERFORMANCE E2CMOS? TECHNOLOGY
— fmax = 90 MHz Maximum Operating Frequency
— fmax = 60 MHz for Industrial and Military/883 Devices
— tpd = 12 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile E2CMOS Technology
— 100 Tested
? ispLSI OFFERS THE FOLLOWING ADDED FEATURES
— In-System Programmable? (ISP?) 5-Volt Only
— Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
? COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue Logic and Structured Designs
— Four Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global Interconnectivity
? ispLSI AND pLSI DEVELOPMENT TOOLS
pDS? Software
— Easy to Use PC Windows? Interface
— Boolean Logic Compiler
— Manual Partitioning
— Automatic Place and Route
— Static Timing Table
ispDS+? Software
— Industry Standard, Third Party Design Environments
— Schematic Capture, State Machine, HDL
— Automatic Partitioning and Place and Route
— Comprehensive Logic and Timing Simulation
— PC and Workstation Platforms
產品屬性
- 型號:
ISPLSI1032-90LJ/833
- 制造商:
LATTICE
- 制造商全稱:
Lattice Semiconductor
- 功能描述:
In-System Programmable High Density PLD
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
LATTICE |
23+ |
BGAQFP |
8659 |
原裝公司現(xiàn)貨!原裝正品價格優(yōu)勢. |
詢價 | ||
Lattice |
23+ |
TQFP-100 |
7000 |
絕對全新原裝!100%保質量特價!請放心訂購! |
詢價 | ||
Lattice |
84 |
公司優(yōu)勢庫存 熱賣中!! |
詢價 | ||||
LATTICE |
23+ |
SOIC8 |
5000 |
原裝正品,假一罰十 |
詢價 | ||
LATTICE |
24+ |
QFP |
875 |
詢價 | |||
LATTICE |
24+ |
FPGA |
4942 |
原裝現(xiàn)貨 |
詢價 | ||
LATTICE |
18+ |
QFP100 |
85600 |
保證進口原裝可開17%增值稅發(fā)票 |
詢價 | ||
LATTICE SEMICONDUCTOR |
2022+ |
原廠原包裝 |
8600 |
全新原裝 支持表配單 中國著名電子元器件獨立分銷 |
詢價 | ||
LATTICE |
1923+ |
QFP |
3000 |
絕對進口原裝現(xiàn)貨 |
詢價 | ||
LAT |
1987 |
87 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 |