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ISPLSI2032-110LJ規(guī)格書詳情
Description
The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2032 and 2032A feature 5V in system programmability and in-system diagnostic capabilities. The ispLSI 2032 and 2032A offer nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.
Features
? ENHANCEMENTS
— ispLSI 2032A is Fully Form and Function Compat to the ispLSI 2032, with Identical Timing Specifcations and Packaging
— ispLSI 2032A is Built on an Advanced 0.35 Micron E2CMOS? Technology
? HIGH DENSITY PROGRAMMABLE LOGIC
— 1000 PLD Gates
— 32 I/O Pins, Two Dedicated Inputs
— 32 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
? HIGH PERFORMANCE E2CMOS? TECHNOLOGY
— fmax = 180 MHz Maximum Operating Frequency
— tpd = 5.0 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100 Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
? IN-SYSTEM PROGRAMMABLE
— In-System Programmable (ISP?) 5V Only
— Increased Manufacturing Yields, Reduced Time-to Market and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyp
? OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBIL OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine G Logic and Structured Designs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control to Minimize Switching Noise
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global Interconnectivity
產(chǎn)品屬性
- 型號(hào):
ISPLSI2032-110LJ
- 功能描述:
CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V
- RoHS:
否
- 制造商:
Lattice
- 存儲(chǔ)類型:
EEPROM
- 大電池?cái)?shù)量:
128
- 最大工作頻率:
333 MHz
- 延遲時(shí)間:
2.7 ns
- 可編程輸入/輸出端數(shù)量:
64
- 工作電源電壓:
3.3 V
- 最大工作溫度:
+ 90 C
- 最小工作溫度:
0 C
- 封裝/箱體:
TQFP-100
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
LATTE/萊迪斯 |
23+ |
NA/ |
3740 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開(kāi)票 |
詢價(jià) | ||
LATTICE |
23+ |
PLCC |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | ||
LATTICE |
PLCC44 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
LATTICE |
23+ |
QFP |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售 |
詢價(jià) | ||
Lattice |
2 |
公司優(yōu)勢(shì)庫(kù)存 熱賣中!! |
詢價(jià) | ||||
LATTICE/萊迪斯 |
2403+ |
PLCC44 |
6489 |
原裝現(xiàn)貨熱賣!十年芯路!堅(jiān)持! |
詢價(jià) | ||
24+ |
PLCC |
47 |
詢價(jià) | ||||
LATTICE |
24+ |
PLCC44 |
16800 |
絕對(duì)原裝進(jìn)口現(xiàn)貨,假一賠十,價(jià)格優(yōu)勢(shì)!? |
詢價(jià) | ||
LATTICE |
23+ |
PLCC44 |
7000 |
詢價(jià) | |||
LATTICE |
2022+ |
PLCC |
20000 |
只做原裝進(jìn)口現(xiàn)貨.假一罰十 |
詢價(jià) |