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ISPLSI2128VE-250LB208中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書
廠商型號(hào) |
ISPLSI2128VE-250LB208 |
功能描述 | 3.3V In-System Programmable SuperFAST??High Density PLD |
文件大小 |
206.11 Kbytes |
頁(yè)面數(shù)量 |
20 頁(yè) |
生產(chǎn)廠商 | Lattice Semiconductor |
企業(yè)簡(jiǎn)稱 |
Lattice【萊迪思】 |
中文名稱 | 萊迪思半導(dǎo)體公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-30 15:30:00 |
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ISPLSI2128VE-250LB208規(guī)格書詳情
Description
The ispLSI 2128VE is a High Density Programmable Logic Device available in 128 and 64 I/O-pin versions.
Features
? SuperFAST HIGH DENSITY IN-SYSTEM
PROGRAMMABLE LOGIC
— 6000 PLD Gates
— 128 and 64 I/O Pin Versions, Eight Dedicated Inputs
— 128 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— 100 Functional, JEDEC and Pinout Compatible
with ispLSI 2128V Devices
? 3.3V LOW VOLTAGE 2128 ARCHITECTURE
— Interfaces with Standard 5V TTL Devices
? HIGH PERFORMANCE E2CMOS? TECHNOLOGY
— fmax = 250MHz Maximum Operating Frequency
— tpd = 4.0ns Propagation Delay
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100 Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
? IN-SYSTEM PROGRAMMABLE
— 3.3V In-System Programmability (ISP?) Using
Boundary Scan Test Access Port (TAP)
— Open-Drain Output Option for Flexible Bus Interface
Capability, Allowing Easy Implementation of Wired
OR Bus Arbitration Logic
— Increased Manufacturing Yields, Reduced Time-to
Market and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
? 100 IEEE 1149.1 BOUNDARY SCAN TESTABLE
? THE EASE OF USE AND FAST SYSTEM SPEED OF
PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
Interconnectivity
? LEAD-FREE PACKAGE OPTIONS
產(chǎn)品屬性
- 型號(hào):
ISPLSI2128VE-250LB208
- 功能描述:
CPLD - 復(fù)雜可編程邏輯器件
- RoHS:
否
- 制造商:
Lattice
- 存儲(chǔ)類型:
EEPROM
- 大電池?cái)?shù)量:
128
- 最大工作頻率:
333 MHz
- 延遲時(shí)間:
2.7 ns
- 可編程輸入/輸出端數(shù)量:
64
- 工作電源電壓:
3.3 V
- 最大工作溫度:
+ 90 C
- 最小工作溫度:
0 C
- 封裝/箱體:
TQFP-100
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
LATTICE |
24+ |
QFP160 |
97 |
詢價(jià) | |||
LATTICE |
24+ |
FPGA |
2494 |
原裝現(xiàn)貨 |
詢價(jià) | ||
Lattice Semiconductor Corporat |
2022+ |
208-FPBGA(17x17) |
38550 |
全新原裝 支持表配單 中國(guó)著名電子元器件獨(dú)立分銷 |
詢價(jià) | ||
Lattice Semiconductor Corporat |
23+ |
208-BGA |
11200 |
主營(yíng):汽車電子,停產(chǎn)物料,軍工IC |
詢價(jià) | ||
LATTICE |
23+ |
TQFP |
1283 |
專業(yè)優(yōu)勢(shì)供應(yīng) |
詢價(jià) | ||
Lattice |
2318+ |
BGA-208 |
4980 |
Lattice全系列進(jìn)口原裝特價(jià) |
詢價(jià) | ||
LATTICE |
15+ |
NA |
1863 |
全新進(jìn)口原裝 |
詢價(jià) | ||
Lattice Semiconductor Corporat |
21+ |
160-BQFP |
24 |
100%進(jìn)口原裝!長(zhǎng)期供應(yīng)!絕對(duì)優(yōu)勢(shì)價(jià)格(誠(chéng)信經(jīng)營(yíng)) |
詢價(jià) | ||
LATTICE/萊迪斯 |
23+ |
QFP160 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
Lattice Semiconductor Corporat |
22+ |
208FPBGA |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) |