首頁(yè)>K4H281638B-TCA0>規(guī)格書(shū)詳情
K4H281638B-TCA0中文資料三星數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
相關(guān)芯片規(guī)格書(shū)
更多K4H281638B-TCA0規(guī)格書(shū)詳情
Features
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? DLL aligns DQ and DQS transition with CK transition
? MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
? Data I/O transactions on both edges of data strobe
? Edge aligned data output, center aligned data input
? LDM,UDM/DM for write masking only
? Auto & Self refresh
? 15.6us refresh interval(4K/64ms refresh)
? Maximum burst refresh cycle : 8
? 66pin TSOP II package
產(chǎn)品屬性
- 型號(hào):
K4H281638B-TCA0
- 制造商:
SAMSUNG
- 制造商全稱:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
23+ |
TSOP |
8890 |
價(jià)格優(yōu)勢(shì)/原裝現(xiàn)貨/客戶至上/歡迎廣大客戶來(lái)電查詢 |
詢價(jià) | ||
SAMSUNG/三星 |
22+ |
TSOP66 |
50000 |
只做原裝正品,假一罰十,歡迎咨詢 |
詢價(jià) | ||
TSSOP |
23+ |
16 |
3500 |
詢價(jià) | |||
TSSOP |
22+ |
ST |
30000 |
十七年VIP會(huì)員,誠(chéng)信經(jīng)營(yíng),一手貨源,原裝正品可零售! |
詢價(jià) | ||
SAMSUNG/三星 |
22+ |
TSOP |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
SAMSUNG |
23+ |
TSOP66 |
7000 |
詢價(jià) | |||
SAMSUNG/三星 |
21+ |
TSOP66 |
10000 |
原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
SAMSUNG |
22+ |
TSOP |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
SAMSUNG |
24+ |
TSSOP |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
SAMSUNG/三星 |
23+ |
TSOP |
89630 |
當(dāng)天發(fā)貨全新原裝現(xiàn)貨 |
詢價(jià) |