首頁>K4X56163P-L>規(guī)格書詳情
K4X56163P-L中文資料三星數(shù)據(jù)手冊PDF規(guī)格書
K4X56163P-L規(guī)格書詳情
FEATURES
? VDD/VDDQ = 1.8V/1.8V
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? MRS cycle with address key programs
- CAS Latency ( 2, 3 )
- Burst Length ( 2, 4, 8, 16 )
- Burst Type (Sequential & Interleave)
? EMRS cycle with address key programs
- Partial Array Self Refresh ( Full, 1/2, 1/4 Array )
- Output Driver Strength Control ( Full, 1/2, 1/4, 1/8 )
? Internal Temperature Compensated Self Refresh
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK).
? Data I/O transactions on both edges of data strobe, DM for masking.
? Edge aligned data output, center aligned data input.
? No DLL; CK to DQS is not synchronized.
? DM0 - DM3 for write masking only.
? Auto refresh duty cycle
- 7.8us for -25 to 85 °C
產(chǎn)品屬性
- 型號：
K4X56163P-L
- 制造商：
SAMSUNG
- 制造商全稱：
Samsung semiconductor
- 功能描述：
16Mx16 Mobile DDR SDRAM
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
SAMSUNG |
BGA |
68500 |
一級代理 原裝正品假一罰十價格優(yōu)勢長期供貨 |
詢價 | |||
SAMSUNG/三星 |
23+ |
BGA |
25000 |
代理原裝現(xiàn)貨,假一賠十 |
詢價 | ||
SEC |
2016+ |
FBGA |
9000 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
SAMSUNG |
21+ |
FBGA |
12588 |
原裝正品,自己庫存 假一罰十 |
詢價 | ||
SAMSUNG/三星 |
23+ |
BGA |
89630 |
當(dāng)天發(fā)貨全新原裝現(xiàn)貨 |
詢價 | ||
SAMSUNG |
23+ |
FBGA |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
SAMSUNG/三星 |
2310+ |
BGA |
3689 |
優(yōu)勢代理渠道,原裝現(xiàn)貨,可全系列訂貨 |
詢價 | ||
SAMSUNG/三星 |
2048+ |
BGA |
9852 |
只做原裝正品現(xiàn)貨!或訂貨假一賠十! |
詢價 | ||
SAMSUNG |
21+ |
BGA |
35200 |
一級代理/放心采購 |
詢價 | ||
SAMSUNG/三星 |
23+ |
FBGA |
28942 |
原盒原標(biāo),正品現(xiàn)貨 誠信經(jīng)營 價格美麗 假一罰十 |
詢價 |
