KS8995M_V01中文資料麥瑞半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

General Description

The KS8995M is a highly integrated Layer-2 managed switch

with optimized BOM (Bill of Materials) cost for low port count,

cost-sensitive 10/100Mbps switch systems. It also provides

an extensive feature set such as tag/port-based VLAN, QoS

(Quality of Service) priority, management, MIB counters, dual

MII interfaces and CPU control/data interfaces to effectively

address both current and emerging Fast Ethernet applications.

The KS8995M contains five 10/100 transceivers with patented

mixed-signal low-power technology, five MAC (Media

Access Control) units, a high-speed non-blocking switch

fabric, a dedicated address look-up engine, and an on-chip

frame buffer memory.

All PHY units support 10BaseT and 100BaseTX. In addition,

two of the PHY units support 100BaseFX (Ports 4 and 5).

All support documentation can be found on Micrel’s web site

at: www.micrel.com.

Features

? Integrated switch with five MACs and five Fast Ethernet

transceivers fully compliant to IEEE 802.3u standard

? Shared memory based switch fabric with fully nonblocking

configuration

? 1.4Gbps high-performance memory bandwidth

? 10BaseT, 100BaseTX and 100BaseFX modes (FX in

Ports 4 and 5)

? Dual MII configuration: MII-Switch (MAC or PHY mode

MII) and MII-P5 (PHY mode MII)

? IEEE 802.1q tag-based VLAN (16 VLANs, full-range

VID) for DMZ port, WAN/LAN separation or inter-VLAN

switch links

? VLAN ID tag/untag options, per-port basis

? Programmable rate limiting 0Mbps to 100Mbps, ingress

and egress port, rate options for high and low priority,

per-port-basis

? Flow control or drop packet rate limiting (ingress port)

? Integrated MIB counters for fully compliant statistics

gathering, 34 MIB counters per port