L74VHC1G50中文資料樂山無線電數(shù)據(jù)手冊PDF規(guī)格書

Noninverting Buffer / CMOS Logic Level Shifter

The L74VHC1G50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.

The L74VHC1G50 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the L74VHC1G50 to be used to interface 5 V circuits to 3 V circuits.

? High Speed: t PD = 3.5 ns (Typ) at V CC = 5 V

? Low Power Dissipation: I CC= 2 mA (Max) at T A= 25°C

? TTL–Compatible Inputs: V IL= 0.8 V; V IH = 2.0 V

? CMOS–Compatible Outputs: V OH > 0.8 V CC ; V OL < 0.1 V CC @Load

? Power Down Protection Provided on Inputs and Outputs

? Balanced Propagation Delays

? Pin and Function Compatible with Other Standard Logic Families

? Chip Complexity: FETs = 104; Equivalent Gates = 26