LG1600KXH2488中文資料agere數(shù)據(jù)手冊(cè)PDF規(guī)格書

Functional Description

The LG1600KXH Clock and Data Regenerator (CDR) is a compact, single device solution to clock recovery and data retiming in high-speed communication systems such as fiber-optic data links and long-span fiberoptic regenerators and terminals. Using frequency and phase-lock loop (FPLL) techniques, the device regenerates clean clock and error-free data signals from a nonreturn-to-zero (NRZ) data input, corrupted by jitter and intersymbol interference. The LG1600KXH exceeds ITU-T/Bellcore jitter tolerance requirements for SONET/SDH systems.

Features

■ Integrated clock recovery and data retiming

■ Surface-mount package

■ Single ECL supply

■ Robust FPLL design

■ Operation up to BER = 1e–3

■ SONET/SDH compatible loss of signal alarm

■ High effective Q allows long run lengths

■ Jitter tolerance exceeding ITU-T/Bellcore

■ Low clock jitter generation: <0.005 UI

■ Standard and custom data rates 0.50 Gbits/s—5.5 Gbits/s

■ Complementary 50 ? I/Os

Applications

■ SONET/SDH receiver terminals and regenerators OC-12 through OC-96/STM-4 through STM-32

■ SONET/SDH test equipment

■ Proprietary bit rate systems

■ Digital video transmission

■ Clock doublers and quadruplers