LH28F400SU-LC中文資料夏普微數(shù)據(jù)手冊PDF規(guī)格書

INTRODUCTION

Sharp’s LH28F400SU-LC 4M Flash Memory is a revolutionary architecture which enables the design of truly mobile, high performance, personal computing and communication products. With innovative capabilities, 3.3 V low power operation and very high read/write performance, the LH28F400SU-LC is also the ideal choice for designing embedded mass storage flash memory systems.

DESCRIPTION

The LH28F400SU-LC is a high performance 4M (4,194,304 bit) block erasable non-volatile random access memory organized as either 256K × 16 or 512K × 8. The LH28F400SU-LC includes thirty-two 16K (16,384) blocks. A chip memory map is shown in Figure 5.

FEATURES

? User-Configurable x8 or x16 Operation

? 5 V Write/Erase Operation (5 V VPP, 3.3 V VCC)

– No Requirement for DC/DC Converter to Write/Erase

? 150 ns Maximum Access Time (VCC = 3.3 V ± 0.3 V)

? Minimum 2.7 V Read Capability

– 190 ns Maximum Access Time (VCC = 2.7 V)

? 32 Independently Lockable Blocks (16K)

? 100,000 Erase Cycles per Block

? Automated Byte Write/Block Erase

– Command User Interface

– Status Register

– RY?/BY? Status Output

? System Performance Enhancement

– Erase Suspend for Read

– Two-Byte Write

– Full Chip Erase

? Data Protection - Hardware Erase/Write Lockout during Power Transitions

– Software Erase/Write Lockout

? Independently Lockable for Write/Erase on Each Block (Lock Block and Protect Set/Reset)

? 4 μA (Typ.) ICC in CMOS Standby

? 0.2 μA (Typ.) Deep Power-Down

? Extended Temperature Operation

– -40°C to +85°C

? State-of-the-Art 0.55 μm ETOX? Flash Technology

? 56-Pin, 1.2 mm × 14 mm × 20 mm TSOP (Type I) Package

? 48-Pin 1.2 mm × 12 mm × 18 mm TSOP (Type I) Package

? 44-Pin 600-mil SOP Package