LH521028中文資料夏普微數(shù)據(jù)手冊(cè)PDF規(guī)格書
LH521028規(guī)格書詳情
FUNCTIONAL DESCRIPTION
The LH521028 is a high-speed 1,179,648-bit CMOS SRAM organized as 64K × 18. A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory cells. The LH521028 is available in a compact 52-Pin PLCC, which along with the six pairs of supply terminals, provide for reliable operation.
FEATURES
? Fast Access Times: 17/20/25/35 ns
? Wide Word (18-Bits) for:
– Improved Performance
– Reduced Component Count
– Nine-bit Byte for Parity
? Transparent Address Latch
? Reduced Loading on Address Bus
? Low-Power Stand-by Mode when Deselected
? TTL Compatible I/O
? 5 V ± 10 Supply
? 2 V Data Retention
? JEDEC Standard Pinout
? Package: 52-Pin PLCC
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
SHARP/夏普 |
1948+ |
DIP-28 |
6852 |
只做原裝正品現(xiàn)貨!或訂貨假一賠十! |
詢價(jià) | ||
SHARP |
24+ |
DIP28 |
500000 |
行業(yè)低價(jià),代理渠道 |
詢價(jià) | ||
SHARP |
24+ |
SOP |
20000 |
全新原廠原裝，進(jìn)口正品現(xiàn)貨，正規(guī)渠道可含稅??！ |
詢價(jià) | ||
SHARP |
24+ |
SOP |
35200 |
一級(jí)代理/放心采購 |
詢價(jià) | ||
SHARS |
23+ |
PLCC52 |
9526 |
詢價(jià) | |||
SHARP |
24+ |
DIP24 |
3629 |
原裝優(yōu)勢(shì)!房間現(xiàn)貨!歡迎來電! |
詢價(jià) | ||
SHARP |
22+23+ |
DIP28 |
23311 |
絕對(duì)原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
SHARS |
23+ |
PLCC44 |
13000 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢價(jià) | ||
SHARP |
22+ |
DIP24 |
3000 |
原裝正品,支持實(shí)單 |
詢價(jià) | ||
SHARP |
DIP-24 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) |
