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LH540203U50中文資料夏普微數(shù)據(jù)手冊(cè)PDF規(guī)格書
LH540203U50規(guī)格書詳情
FUNCTIONAL DESCRIPTION
The LH540203 is a FIFO (First-In, First-Out) memory device, based on fully-static CMOS dual-port SRAM technology, capable of storing up to 2048 nine-bit words. It follows the industry-standard architecture and package pinouts for nine-bit asynchronous FIFOs. Each nine-bit LH540203 word may consist of a standard eight-bit byte, together with a parity bit or a block-marking/framing bit.
FEATURES
? Fast Access Times: 15/20/25/35/50 ns
? Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology
? Input Port and Output Port Have Entirely Independent Timing
? Expandable in Width and Depth
? Full, Half-Full, and Empty Status Flags
? Data Retransmission Capability
? TTL-Compatible I/O
? Pin and Functionally Compatible with Sharp LH5498 and with Am/IDT/MS7203
? Control Signals Assertive-LOW for Noise Immunity
? Packages:
28-Pin, 300-mil PDIP
28-Pin, 300-mil SOJ *
32-Pin PLCC
產(chǎn)品屬性
- 型號(hào):
LH540203U50
- 制造商:
SHARP
- 制造商全稱:
Sharp Electrionic Components
- 功能描述:
CMOS 2048X9 ASYNCHRONOUS FIFO
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
22+ |
TSSOP24 |
25000 |
只做原裝,原裝,假一罰十 |
詢價(jià) | ||
SHARP |
23+ |
DIP |
9526 |
詢價(jià) | |||
SHARP |
24+ |
DIP-28 |
4650 |
詢價(jià) | |||
原廠 |
2023+ |
TSOP |
50000 |
原裝現(xiàn)貨 |
詢價(jià) | ||
SHARP/夏普 |
18+ |
QFP64 |
12500 |
全新原裝正品,本司專業(yè)配單,大單小單都配 |
詢價(jià) | ||
SHRP |
22+ |
QFP |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
TI |
TSSOP24 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
2315+ |
QFP |
3266 |
優(yōu)勢(shì)代理渠道,原裝現(xiàn)貨,可全系列訂貨 |
詢價(jià) | |||
SHARP |
24+ |
QFP128 |
35200 |
一級(jí)代理/放心采購 |
詢價(jià) | ||
SHARP |
25+ |
PLCC |
680 |
原裝現(xiàn)貨熱賣中,提供一站式真芯服務(wù) |
詢價(jià) |