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LMK04828-EP中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

LMK04828-EP
廠商型號(hào)

LMK04828-EP

功能描述

LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner

文件大小

1.76875 Mbytes

頁(yè)面數(shù)量

102 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI德州儀器

中文名稱

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-2-3 13:28:00

LMK04828-EP規(guī)格書(shū)詳情

1 Features

1? EP Features

– Gold Bondwires

– Temperature Range: –55 to +105 °C

– Lead Finish SnPb

? Maximum Distribution Frequency: 3.2 GHz

? JESD204B Support

? Ultra-Low RMS Jitter

– 88-fs RMS Jitter (12 kHz to 20 MHz)

– 91-fs RMS Jitter (100 Hz to 20 MHz)

– –162.5 dBc/Hz Noise Floor at 245.76 MHz

? Up to 14 Differential Device Clocks From PLL2

– Up to 7 SYSREF Clocks

– Maximum Clock Output Frequency 3.2 GHz

– LVPECL, LVDS, HSDS, LCPECL

Programmable Outputs From PLL2

? Up to 1 Buffered VCXO/Crystal Output From PLL1

– LVPECL, LVDS, 2xLVCMOS Programmable

? Multi-Mode: Dual PLL, Single PLL, and Clock

Distribution

? Dual Loop PLLatinum? PLL Architecture

? PLL1

– Up to 3 Redundant Input Clocks

– Automatic and Manual Switchover Modes

– Hitless Switching and LOS

– Integrated Low-Noise Crystal Oscillator Circuit

– Holdover Mode When Input Clocks are Lost

? PLL2

– Normalized [1 Hz] PLL Noise Floor of

–227 dBc/Hz

– Phase Detector Rate up to 155 MHz

– OSCin Frequency-Doubler

– Two Integrated Low-Noise VCOs

? 50 Duty Cycle Output Divides, 1 to 32

(Even and Odd)

? Precision Digital Delay, Dynamically Adjustable

? 25-ps Step Analog Delay

? 3.15-V to 3.45-V Operation

? Package: 64-Pin WQFN (9.0 mm × 9.0 mm × 0.8

mm)

2 Applications

? Wireless Infrastructure

? Data Converter Clocking

? Networking, SONET/SDH, DSLAM

? Medical / Video / Military / Aerospace

? Test and Measurement

3 Description

The LMK04828-EP device is the industry's highest

performance clock conditioner with JESD204B

support.

The 14 clock outputs from PLL2 can be configured to

drive seven JESD204B converters or other logic

devices using device and SYSREF clocks. SYSREF

can be provided using both DC and AC coupling. Not

limited to JESD204B applications, each of the 14

outputs can be individually configured as highperformance

outputs for traditional clocking systems.

The high performance combined with features like the

ability to trade off between power or performance,

dual VCOs, dynamic digital delay, holdover, and

glitchless analog delay make the LMK04828-EP ideal

for providing flexible high-performance clocking trees.

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
TI/德州儀器
22+
WQFN-64
9600
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單!
詢價(jià)
TI(德州儀器)
2021+
-
499
詢價(jià)
TI/德州儀器
22+
QFN
9000
原裝正品
詢價(jià)
TI/德州儀器
23+
13000
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種
詢價(jià)
TI
三年內(nèi)
1983
只做原裝正品
詢價(jià)
ADI
23+
QFN
8000
只做原裝現(xiàn)貨
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TI/德州儀器
23+
QFN
50000
全新原裝正品現(xiàn)貨,支持訂貨
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TI(德州儀器)
2117+
-
315000
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨
詢價(jià)
TI
24+
-
18948
專注TI原裝正品代理分銷,認(rèn)準(zhǔn)水星電子
詢價(jià)
TI/德州儀器
21+
WQFN64
13880
公司只售原裝,支持實(shí)單
詢價(jià)