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LMS12JC40中文資料LODEV數(shù)據(jù)手冊(cè)PDF規(guī)格書

LMS12JC40
廠商型號(hào)

LMS12JC40

功能描述

12-bit Cascadable Multiplier-Summer

文件大小

195.44 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

生產(chǎn)廠商 LOGIC Devices Incorporated
企業(yè)簡(jiǎn)稱

LODEV

中文名稱

LOGIC Devices Incorporated

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-1-5 23:00:00

LMS12JC40規(guī)格書詳情

DESCRIPTION

The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated with a 26-bit adder in a single 84-pin package. It is an ideal building block for the implementation of very highspeed FIR filters for video, RADAR, and other similar applications. The LMS12 implements the general form (A?B) + C. As a result, it is also useful in implementing polynomial approximations to transcendental functions.

FEATURES

? 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer

? Summer has 26-bit Input Port Fully Independent from Multiplier Inputs

? Cascadable to Form Video Rate FIR Filter with 3-bit Headroom

? A, B, and C Input Registers Separately Enabled for Maximum Flexibility

? 28 MHz Data Rate for FIR Filtering Applications

? High Speed, Low Power CMOS Technology

? 84-pin PLCC, J-Lead

產(chǎn)品屬性

  • 型號(hào):

    LMS12JC40

  • 制造商:

    LOGIC

  • 制造商全稱:

    LOGIC

  • 功能描述:

    12-bit Cascadable Multiplier-Summer

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