LP62S16128BV-70LLI中文資料歐密格數據手冊PDF規(guī)格書

General Description

The LP62S16128B-I is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMICs high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 2V.

Features

■ Operating voltage: 2.7V to 3.6V

■ Access times: 55/70 ns (max.)

■ Current:

Very low power version: Operating: 55ns 40mA (max.)

70ns 35mA (max.)

Standby: 10mA (max.)

■ Full static operation, no clock or refreshing required

■ All inputs and outputs are directly TTL-compatible

■ Common I/O using three-state output

■ Data retention voltage: 2V (min.)

■ Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages