LSF0108_V01中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1 Features

? Provides bidirectional voltage translation with no

direction pin

? Supports up to 100-MHz up translation and greater

than 100-MHz down translation at

≤ 30 pF cap load and up To 40-MHz up/down

translation at 50 pF cap load

? Allows bidirectional voltage-level translation

between

– 0.95 V ? 1.8/2.5/3.3/5 V

– 1.2 V ? 1.8/2.5/3.3/5 V

– 1.8 V ? 2.5/3.3/5 V

– 2.5 V ? 3.3/5 V

– 3.3 V ? 5 V

? Low standby current

? 5-V tolerance I/O port to support TTL

? Low RON provides less signal distortion

? High-impedance I/O pins for EN = Low

? Flow-through pinout for easy PCB trace routing

? Latch-up performance >100 mA per JESD 17

? –40°C to 125°C operating temperature range

2 Applications

? GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C,

and other interfaces in telecom infrastructure

? Enterprise systems

? Communications equipment

? Personal electronics

? Industrial applications

3 Description

The LSF family of devices supports bidirectional

voltage translation without the need for DIR pin which

minimizes system effort (for PMBus, I2C, SMBus, and

so forth). The LSF family of devices supports up to

100-MHz up translation and greater than 100-MHz

down translation at ≤ 30 pF cap load and up to 40-

MHz up/down translation at 50 pF cap load which

allows the LSF family to support more consumer or

telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which

makes it compatible with TTL levels in industrial and

telecom applications. The LSF family is able to set

up different voltage translation levels on each channel

which makes it very flexible.