LU3X31T-T64中文資料agere數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Overview

The LU3X31T-T64 is a fully integrated 10/100 Mbits/s physical layer device with an integrated transceiver. It is provided in a 64-pin TQFP package with low-power operation and powerdown modes. Typical applications for this part are CardBus and PCMCIA Ethernet products. Operating at 3.3 V, the LU3X31T-T64 is a powerful device for the forward migration of legacy 10 Mbits/s products and noncompliant (does not have autonegotiation) 100 Mbits/s devices. The LU3X31T-T64 was designed from the beginning to conform fully with all pertinent specifications, from the ISO*/IEC 11801 and EIA?/TIA 568 cabling guidelines to ANSI? X3.263 TP-PMD to IEEE§ 802.3 Ethernet specifications.

Features

■ Single-chip integrated physical layer and transceiver for 10Base-T and/or 100Base-T functions

■ IEEE 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD compatible transceiver

■ Built-in analog 10 Mbits/s receive filter, eliminating the need for external filters

■ Built-in 10 Mbits/s transmit filter

■ 10 Mbits/s PLL exceeding tolerances for both preamble and data jitter

■ 100 Mbits/s PLL, combined with the digital adaptive equalizer, robustly handles variations in risefall time, excessive attenuation due to channel loss, duty-cycle distortion, crosstalk, and baseline wander

■ Transmit rise-fall time can be manipulated to provide lower emissions, amplitude fully compatible for proper interoperability

■ Programmable scrambler seed for better FCC compliancy

■ IEEE 802.3u Clause 28 compliant autonegotiation for full 10 Mbits/s and 100 Mbits/s control

■ Fully configurable via pins and management accesses

■ Extended management support with interrupt capabilities

■ PHY MIB support

■ Symbol mode option

■ Low-power operation: <150 mA max

■ Low autonegotiation power: <30 mA

■ Very low powerdown mode: <5 mA

■ 64-pin TQFP package (10 mm x 10 mm x 1.4 mm)