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M24128-BWBN6T中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

M24128-BWBN6T
廠(chǎng)商型號(hào)

M24128-BWBN6T

功能描述

256/128 Kbit Serial IC Bus EEPROM With Three Chip Enable Lines

文件大小

172.22 Kbytes

頁(yè)面數(shù)量

19 頁(yè)

生產(chǎn)廠(chǎng)商 STMicroelectronics
企業(yè)簡(jiǎn)稱(chēng)

STMICROELECTRONICS意法半導(dǎo)體

中文名稱(chēng)

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠(chǎng)標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-8 16:34:00

M24128-BWBN6T規(guī)格書(shū)詳情

DESCRIPTION

These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 32Kx8 bits (M24256-B) and 16Kx8 bits (M24128-B).

These memory devices are compatible with the I2C extended memory standard. This is a two wire serial interface that uses a bi-directional data bus and serial clock. The memory carries a built-in 4- bit unique Device Type Identifier code (1010) in accordance with the I2C bus definition.

■ Compatible with I2C Extended Addressing

■ Two Wire I2C Serial Interface Supports 400 kHz Protocol

■ Single Supply Voltage:

– 4.5V to 5.5V for M24xxx-B

– 2.5V to 5.5V for M24xxx-BW

– 1.8V to 3.6V for M24xxx-BR

■ Hardware Write Control

■ BYTE and PAGE WRITE (up to 64 Bytes)

■ RANDOM and SEQUENTIAL READ Modes

■ Self-Timed Programming Cycle

■ Automatic Address Incrementing

■ Enhanced ESD/Latch-Up Behavior

■ 100000 Erase/Write Cycles (minimum)

■ 40 Year Data Retention (minimum)

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