M25PE40集成電路（IC）的存儲器規(guī)格書PDF中文資料

Description

The is a 4 Mbit (512Kb × 8 bit) Serial Paged Flash memory accessed by a high speed SPIcompatible bus. The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle followed by a Page Program cycle.

Features

■ SPI bus compatible serial interface

■ 4 Mbit Page-Erasable Flash memory

■ Page size: 256 bytes

– Page Write in 11 ms (typical)

– Page Program in 0.8 ms (typical)

– Page Erase in 10 ms (typical)

■ SubSector Erase (4 Kbytes)

■ Sector Erase (64 Kbytes)

■ Bulk Erase (4 Mbits)

■ 2.7 V to 3.6 V single supply voltage

■ 50 MHz clock rate (maximum)

■ Deep Power-down mode 1 μA (typical)

■ Electronic Signature

– JEDEC standard two-byte signature(8013h)

■ Software Write Protection on a 64 Kbyte sector basis

■ Hardware Write Protection of the memory area selected using the BP0, BP1 and BP2 bits

■ More than 100 000 Write cycles

■ More than 20 year data retention

■ Packages

– ECOPACK? (RoHS compliant)