M32000D4AFP中文資料三菱電機數據手冊PDF規(guī)格書

DESCRIPTION

The M32000D4AFP is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM. Using this device it is possible to implement the complex applications of the multimedia age with high performance and low power consumption.

FEATURES

? CPU .......................................................... M32R family CPU core

? Pipeline .............................................................................. 5 steps

? Basic bus cycle ................................. 15 ns (at internal 66.6 MHz)

? Logical address space ............................................ 4G-byte linear

? External bus ........................................................ data bus: 16 bits

address bus: 24 bits

? Internal DRAM ............................................... 16M bits (2M bytes)

? Cache .......................................................... 4K bytes (direct map)

? Register configuration ...... general-purpose registers: 32 bits x 16

control registers: 32 bits x 5

? Instruction set ....................... 83 instructions/6 addressing modes

? Instruction format .................................................... 16 bits/32 bits

? Multiply-accumulate operation unit (DSP function instruction)

? Internal memory controller

? Programmable I/O ports

? Power management function .................................. standby mode

/CPU sleep mode

? PLL clock generating circuit ................. four-time clock PLL circuit

? Operation mode .............................................. master/slave mode

? Interrupt input ............................................................ INT and SBI

? Power source .......................................................... 3.3 V (±10 )

APPLICATIONS

Portable equipment, Still camera, Navigation system, Digital instrument, Printer, Scanner, FA equipment