M40Z300集成電路（IC）的監(jiān)控器規(guī)格書PDF中文資料

M40Z300屬于集成電路（IC）的監(jiān)控器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M40Z300監(jiān)控器PMIC 監(jiān)控器用于監(jiān)視和/或控制電路中的電壓軌，能夠連接微控制器以維持一定的功率限值。監(jiān)控器類型包括電池備用電路、監(jiān)控器、多電壓監(jiān)控器、電源監(jiān)控器、穩(wěn)壓器/監(jiān)控器、復(fù)位計(jì)時(shí)器、定序器、簡(jiǎn)單復(fù)位/上電復(fù)位、智能開/關(guān)控制器、系統(tǒng)管理器、電壓檢測(cè)器和看門狗電路。

Description

The M40Z300/W NVRAM supervisor is a self-contained device which converts a standard low-power SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition.

Features

■ Converts low power SRAM into NVRAMs

■ Precision power monitoring and power

switching circuitry

■ Automatic WRITE-protection when VCC is outof-tolerance

■ Two-input decoder allows control for up to

8 SRAMs (with 2 devices active in parallel)

■ Choice of supply voltages and power-fail

deselect voltages:

– M40Z300:

VCC = 4.5 V to 5.5 V

THS = VSS: 4.5 V ≤ VPFD ≤ 4.75 V

THS = VOUT: 4.2 V ≤ VPFD ≤ 4.5 V

– M40Z300W:

VCC = 3.0 V to 3.6 V

THS = VSS: 2.8 V ≤ VPFD ≤ 3.0 V

VCC = 2.7 V to 3.3 V

THS = VOUT: 2.5 V ≤ VPFD ≤ 2.7 V

■ Reset output (RST) for power on reset

■ Battery low pin (BL)

■ Less than 12 ns chip enable access

propagation delay (for 5.0 V device)

■ Packaging includes a 28-lead SOIC and

SNAPHAT? top (to be ordered separately), or

A 16-lead SOIC

■ SOIC package provides direct connection for a

SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect