M41ST85YMH6TR中文資料意法半導體數據手冊PDF規(guī)格書

SUMMARY DESCRIPTION

The M41ST85Y/W Serial TIMEKEEPER?/Controller SRAM is a low power 512-bit, static CMOS SRAM organized as 64 words by 8 bits. A built-in 32.768 kHz oscillator (external crystal controlled) and 8 bytes of the SRAM (see Table 2., page 14) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format.

FEATURES SUMMARY

■ 5.0 OR 3.0V OPERATING VOLTAGE

■ SERIAL INTERFACE SUPPORTS I2C BUS(400 KHz)

■ NVRAM SUPERVISOR FOR EXTERNAL LPSRAM

■ OPTIMIZED FOR MINIMAL INTERCONNECT TO MCU

■ 2.5 TO 5.5V OSCILLATOR OPERATING VOLTAGE

■ AUTOMATIC SWITCH-OVER AND DESELECT CIRCUITRY

■ CHOICE OF POWER-FAIL DESELECT VOLTAGES

– M41ST85Y: VCC= 4.5 to 5.5V; 4.20V ≤VPFD ≤4.50V

– M41ST85W: VCC= 2.7 to 3.6V; 2.55V ≤VPFD ≤2.70V

■ 1.25V REFERENCE (for PFI/PFO)

■ COUNTERS FOR TENTHS/HUNDREDTHS OF SECONDS, SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEAR, AND

CENTURY

■ 44 BYTES OF GENERAL PURPOSE RAM

■ PROGRAMMABLE ALARM AND INTERRUPT FUNCTION (VALID EVEN DURING BATTERY BACK-UP MODE)

■ WATCHDOG TIMER

■ MICROPROCESSOR POWER-ON RESET

■ BATTERY LOW FLAG

■ POWER-DOWN TIMESTAMP (HT BIT)

■ ULTRA-LOW BATTERY SUPPLY CURRENT OF 500nA (MAX)

■ PACKAGING INCLUDES A 28-LEAD SOIC AND SNAPHAT? TOP (to be ordered separately)

■ SOIC SNAPHAT PACKAGE PROVIDES DIRECT CONNECTION FOR A SNAPHAT TOP WHICH CONTAINS THE BATTERY

AND CRYSTAL

■ SOIC EMBEDDED CRYSTAL PACKAGE (MX) OPTION

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