M41T00AUDD1F集成電路（IC）的實(shí)時(shí)時(shí)鐘規(guī)格書(shū)PDF中文資料

M41T00AUDD1F屬于集成電路（IC）的實(shí)時(shí)時(shí)鐘。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M41T00AUDD1F實(shí)時(shí)時(shí)鐘實(shí)時(shí)時(shí)鐘 (RTC) 為幾乎所有需要保持精確時(shí)間的電子設(shè)備提供時(shí)間和/或日期信息。時(shí)鐘類型有二進(jìn)制計(jì)數(shù)器、時(shí)鐘/日歷/監(jiān)控器、歷時(shí)計(jì)時(shí)器、幻時(shí)鐘芯片、便攜式系統(tǒng)控制器、溫度記錄器、時(shí)間事件記錄器和計(jì)時(shí)器時(shí)鐘外設(shè)。其包含 2 B 至 2 MB 不等的存儲(chǔ)器，接口選項(xiàng)有 I2C、并行、串行、SPI、1 線式、2 線式、3 線式和 4 線式。

Description

The M41T00AUD is a low-power serial real-time clock (RTC) with an integral audio section with tone generator and 300 mW output amplifier.

Features

Combination real-time clock with audio

■ Serial real-time clock (RTC) based on M41T00

■ Audio section provides:

– 300 mW differential audio amplifier

– 256 and 512 Hz tone generation

– –33 to +12 dB gain, 3 dB steps (16 steps

plus MUTE)

■ 0 °C to 70 °C operation

■ Small DFN16 package (5 mm x 4 mm)

Real-time clock details

■ Superset of M41T00

■ 3.0 to 3.6 V operation

– Timekeeping down to 1.7 V

■ Automatic backup switchover circuit

– Ultra-low 400 nA backup current at 3.0 V

(typ)

– Suitable for battery or capacitor backup

– On-chip trickle charge circuit for backup

capacitor

■ 400 kHz I2C bus

■ M41T00 compatible register set with counters

for seconds, minutes, hours, day, date, month,

years, and century

– Automatic leap year compensation

– HT bit set when clock goes into backup

mode

■ RTC operates using 32,768 Hz quartz crystal

– Calibration register provides for

adjustments of –63 to +126 ppm

– Oscillator supports crystals with up to 40

kΩ series resistance, 12.5 pF load

capacitance

■ Oscillator fail detect circuit OF bit indicates

when oscillator has stopped for four or more

cycles

Audio section

■ Power amplifier

– Differential output amplifier

– Provides 300 mW into 8 Ω

(THD+N = 2 (max), fin = 1 kHz)

■ Summing node at audio input

– Inverting configuration with summing

resistors into the minus (-) terminal

– 0 dB gain with 10 kΩ feedback resistor and

20 kΩ input summing resistors

– Signal input centered at VDD/2

– 1.6 VP-P analog input range (max)

■ 256 or 512 Hz signal multiplexing with analog

input to provide audio with beep tones

■ Volume control, 4-bit register

– Allows gain adjustment from –33 dB to

+12 dB

– 3 dB steps

– MUTE bit

■ Audio automatically shuts off in backup mode