M48Z2M1-70PL1中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M48Z2M1/2M1Y ZEROPOWER? RAM is a non-volatile 16,777,216 bit Static RAM organized as 2,097,152 words by 8 bits. The device combines two internal lithium batteries, CMOS SRAMs and a control circuit in a plastic 36 pin DIP long Module.

■ INTEGRATED LOW POWER SRAM,

POWER-FAIL CONTROL CIRCUIT and

BATTERIES

■ CONVENTIONAL SRAM OPERATION;

UNLIMITED WRITE CYCLES

■ 10 YEARS of DATA RETENTION in the

ABSENCE of POWER

■ AUTOMATIC POWER-FAIL CHIP DESELECT

and WRITE PROTECTION

■ WRITE PROTECT VOLTAGES

(VPFD = Power-fail Deselect Voltage):

– M48Z2M1: 4.5V ≤ VPFD ≤ 4.75V

– M48Z2M1Y: 4.2V ≤ VPFD ≤ 4.50V

■ BATTERIES ARE INTERNALLY ISOLATED

UNTIL POWER IS APPLIED

■ PIN and FUNCTION COMPATIBLE with

JEDEC STANDARD 2Mb x 8 SRAMs