M50LPW116集成電路（IC）的存儲器規(guī)格書PDF中文資料

M50LPW116屬于集成電路（IC）的存儲器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M50LPW116存儲器存儲器是集成電路上用作數(shù)據(jù)存儲設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

DESCRIPTION

The M50LPW116 is a 16 Mbit (2Mb x8) nonvolatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (3.0 to 3.6V) supply. For fast programming, and fast erasing, an optional 12V power supply can be used to reduce the programming and the erasing times.

■ SUPPLY VOLTAGE

– VCC = 3V to 3.6V for Program, Erase and Read Operations

– VPP = 12V for Fast Program and Fast Erase

■ TWO INTERFACES

– Low Pin Count (LPC) Standard Interface for embedded operation with PC Chipsets.

– Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility.

■ LOW PIN COUNT (LPC) HARDWARE INTERFACE MODE

– 5 Signal Communication Interface supporting Read and Write Operations

– Hardware Write Protect Pins for Block Protection

– Register Based Read and Write Protection

– 5 Additional General Purpose Inputs for platform design flexibility

– Synchronized with 33 MHz PCI clock

■ BYTE PROGRAMMING TIME

– Single Byte Mode: 10μs (typical)

– Quadruple Byte Mode: 2.5μs (typical)

■ 50 MEMORY BLOCKS

– 1 Boot Block

– 18 Parameter and 31 Main Blocks

■ PROGRAM/ERASE CONTROLLER

– Embedded Byte Program and Block/Chip Erase algorithms

– Status Register Bits

■ PROGRAM and ERASE SUSPEND

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code: 30h