M54HC126M1R中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M54/74HC125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology.

■ HIGH SPEED

tPD = 8 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 4 μA (MAX.) AT 25 °C

■ OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ SYMMETRICAL OUTPUT IMPEDANCE

IOL = |IOH| = 6 mA (MIN.)

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE

WITH 54/74LS125/126