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M54HC242B1R中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

M54HC242B1R
廠商型號

M54HC242B1R

功能描述

QUAD BUS TRANSCEIVER 3-STATE

文件大小

257 Kbytes

頁面數(shù)量

11

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導體

中文名稱

意法半導體集團官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-22 18:05:00

M54HC242B1R規(guī)格書詳情

DESCRIPTION

The M54/74HC242/243 are high speed CMOS QUAD BUS TRANSCEIVER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The HC242/243 are 3 STATE bi-directional inverting and non-inverting buffers and are intended for two-way asynchronous communication between data buses. They are high drive current outputs which enable high speed operation when driving large bus capacitances.

■ HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT 25 °C

■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ SYMMETRICAL OUTPUT IMPEDANCE IOL = ?IOH? = 6 mA (MIN.)

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS242/243

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ST
9214
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3209
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ST
DIP14
93480
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ST
12+
原廠封裝
4
宇航IC只做原裝假一罰十
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ST
589220
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ST
22+
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16900
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ST
24+
DIP-20
3
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ST
2020+
CDIP16
80000
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詢價
STM原廠目錄
24+
DIL-20;Flat-
28500
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ST/意法
22+
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ST
24+
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3208
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