M54HC688F1R中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M54/74HC688 utilizes silicon gate C2MOS technology to achieve operating speeds equivalent to LSTTL devices. Along with the low power dissipation and high noise immunity of standard C2MOS integrated circuit, it possesses the driving capability of 10 LSTTL load. The M54/74HC688 compares bit for bit two 8-bit words applied on inputs P0 - P7 and inputs Q0 -Q7 and indicates whether or not they are equal. A single active low enable is provided to facilitate cascading several packages to enable comparison of words greater than 8 bits. All inputs are equipped with protection circuit against static discharge and transient excess voltage.

■ HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS688