M54HC77F1R中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M54/74HC77 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption.

■ HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 2 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS77