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M59DR008E120ZB1T中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

M59DR008E120ZB1T
廠商型號

M59DR008E120ZB1T

功能描述

8 Mbit 512Kb x16, Dual Bank, Page Low Voltage Flash Memory

文件大小

267.87 Kbytes

頁面數(shù)量

37

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體(ST)集團官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

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更新時間

2024-11-19 14:33:00

M59DR008E120ZB1T規(guī)格書詳情

DESCRIPTION

The M59DR008 is an 8 Mbit non-volatile Flash memory that may be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 1.65V to 2.2V VDD supply for the circuitry. For Program and Erase operations the necessary high voltages are generated internally. The device supports asynchronous page mode from all the blocks of the memory array.

■ SUPPLY VOLTAGE

– VDD = VDDQ = 1.65V to 2.2V: for Program, Erase and Read

– VPP = 12V: optional Supply Voltage for fast Program and Erase

■ ASYNCHRONOUS PAGE MODE READ

– Page Width: 4 words

– Page Access: 35ns

– Random Access: 100ns

■ PROGRAMMING TIME

– 10μs by Word typical

– Double Word Programming Option

■ MEMORY BLOCKS

– Dual Bank Memory Array: 4 Mbit - 4 Mbit

– Parameter Blocks (Top or Bottom location)

– Main Blocks

■ DUAL BANK OPERATIONS

– Read within one Bank while Program or Erase within the other

– No delay between Read and Write operations

■ BLOCK PROTECTION/UNPROTECTION

– All Blocks protected at Power Up

– Any combination of Blocks can be protected

– WP for Block Locking

■ COMMON FLASH INTERFACE (CFI)

■ 64 bit SECURITY CODE

■ ERASE SUSPEND and RESUME MODES

■ 100,000 PROGRAM/ERASE CYCLES per BLOCK

■ 20 YEARS DATA RETENTION

– Defectivity below 1ppm/year

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code, M59DR008E: A2h

– Device Code, M59DR008F: A3h

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