M69KB096AA85AW8中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

SUMMARY DESCRIPTION

The M69KB096AA is a 64 Mbit (67,108,864 bit) PSRAM, organized as 4,194,304 words by 16 bits. The memory array is implemented using a one transistor-per-cell topology, to achieve bigger array sizes.

This device is a high-speed CMOS, dynamic random-access memory. It provides a high-density solution for low-power handheld applications.

FEATURES SUMMARY

■ SUPPLY VOLTAGE

– VCC = 1.7 to 1.95V core supply voltage

– VCCQ = 1.7 to 3.3V for I/O buffers

■ ASYNCHRONOUS MODES

– Asynchronous Random Read: 70ns and 85ns access time

– Asynchronous Write

– Asynchronous Page Read

Page Size: 16 words

Subsequent read within page: 20ns

■ SYNCHRONOUS BURST READ AND WRITE MODES

– Burst Write in Continuous Mode

– Burst Read:

Fixed Length (4, 8, or 16 Words) or Continuous mde

Maximum Clock Frequency: 66MHz, 80MHz

Burst initial latency: 50ns (4 clock cycles) at 80MHz

Output delay: 9ns at 80MHz

■ BYTE CONTROL BY LB/UB

■ LOW POWER CONSUMPTION

– Asynchronous Random Read Mode: < 25mA

– Asynchronus Page Read Mode (subsequent read operations): < 15mA

– Synchronous Burst Read

Initial access: < 35mA

Continuous Burst Read: < 15mA

– Standby Current: 120μA

– Deep Power-Down Current: 10μA (typ)

■ LOW POWER FEATURES

– Temperature Compensated Refresh (TCR)

– Partial Array Refresh (PAR)

– Deep Power-Down (DPD) Mode

■ OPERATING TEMPERATURE

– –30°C to +85°C