M74HC147集成電路（IC）的信號開關(guān)多路復(fù)用器解碼器規(guī)格書PDF中文資料

M74HC147屬于集成電路（IC）的信號開關(guān)多路復(fù)用器解碼器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M74HC147信號開關(guān)，多路復(fù)用器，解碼器邏輯型信號開關(guān)、多路復(fù)用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據(jù)的電信號進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號的類似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無窮變化量。

DESCRIPTION

The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption.

This device features priority encoding of the inputs to ensure that only the highest order data line is encoded. Nine input lines are encoded to a four line BCD output. The implied decimal zero condition requires no input condition as zero is encoded when all nine datalinesare athigh logic level. Alldata input and outputs are active at the low logic level. All in puts are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED

tPD = 15 ns (TYP.) at VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 4 μA (MAX.) at TA = 25 °C

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE

?IOH? = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V to 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS147